Embedded Firmware Debugger
Debug embedded firmware crashes in minutes with dump analysis
What You Can Do
You can analyze firmware crash dumps, register states, and memory layouts to identify root causes without manual hex digging. This skill reconstructs stack traces, detects memory corruption patterns, and flags real-time constraint violations. It supports ARM Cortex-M, RISC-V, and other architectures, helping you pinpoint elusive bugs in production scenarios or post-mortem investigations.
Features
Extract meaningful data from ELF binaries and core dumps with symbol resolution
Decode ARM/RISC-V registers and identify suspicious values and state anomalies
Map stack, heap, and data segments to detect corruption boundaries and overflow
Link addresses to function symbols and source code lines for fast navigation
Spot priority inversion, deadlocks, and scheduler constraint violations
Debug ARM Cortex-M, RISC-V, x86, and PowerPC firmware issues
Parse GDB output and breakpoint logs for correlating crashes with system state
Trace initialization sequences and memory remapping issues
Example Output
Example 1: Hard Fault Diagnosis
Input: ARM Cortex-M4 crash dump with registers r0-r15, PSR, CFSR, BFAR
Output:
- Root Cause: Stack overflow in ISR context
- Evidence: PSR.SPSEL=1, stack pointer 0x20000100 collides with heap at 0x20000104
- Call Stack: HardFault_Handler ← SysTick_ISR ← malloc (recursive call)
- Recommendation: Increase stack size or refactor ISR to use static buffers
Example 2: Memory Corruption Detection
Input: Heap corruption at 0x20002000, adjacent block overwritten
Output:
- Corruption Pattern: Size marker overwritten with 0xDEADBEEF
- Suspect Allocation: malloc at main.c:142 allocated 64 bytes, wrote 128
- Root Cause: strcpy without bounds checking in parse_config()
- Fix: Replace with strncpy and verify bounds at compile-time
What's Included
- SKILL.md: Embedded firmware debugging workflows and decision trees
- Crash Dump Analysis Checklist: Step-by-step guide for interpreting register states and stack traces
- Register Reference: ARM Cortex-M and RISC-V register field meanings and exception codes
- Memory Corruption Template: Heap/stack overflow detection and boundary analysis
- GDB Command Cheat Sheet: Extract memory, dump registers, set breakpoints, automate inspection
- Post-Mortem Workflow: Analyze production crashes without live device access
Who It's For
- Embedded Systems Engineers — Debug firmware in microcontrollers and SoCs
- Firmware Developers — Diagnose RTOS and bootloader issues
- Device Driver Engineers — Analyze kernel crashes and memory violations
- IoT/Edge Developers — Troubleshoot production deployments remotely
- Hardware Validation Engineers — Correlate crashes with hardware state transitions
Best For
- Production Crash Analysis — Diagnose crashes without live device access
- Memory Corruption — Detect heap overflow, stack corruption, and use-after-free bugs
- Real-Time Issues — Identify priority inversion, missed deadlines, and scheduler violations
- Bootloader Debugging — Trace initialization sequences and memory remapping problems
- RTOS Integration — Analyze task state, semaphore deadlocks, and context switch anomalies
You might also like
You can accelerate your entire antenna design workflow—from initial concept to optimized specifications—by leveraging Claude's knowledge of electromagnetic theory, antenna types, and design trade-offs. Claude helps you parameterize designs, identify optimal configurations for your frequency band and application, and prepare detailed briefs for simulation and manufacturing. You'll generate design reviews, impedance-matching solutions, and validation checklists without context-switching to multiple tools.
Rapidly analyze production incidents by correlating observability signals—logs, metrics, traces, and events—to identify the true root cause instead of symptoms. You'll reconstruct incident timelines, quantify impact scope, and generate both immediate remediation steps and long-term prevention measures.
Claude analyzes your code diffs and generates standardized commit messages that follow the Conventional Commits specification. The skill automatically determines the correct commit type, scope, and description based on the changes you've made, ensuring your messages are parseable by automation tools while remaining human-readable for code reviewers.
You'll transform high-level feature requirements into a complete development plan covering API design, frontend implementation, testing strategy, and documentation. The skill helps you identify dependencies, parallelize work across frontend and backend teams, and establish quality gates that ensure features ship bug-free with proper error handling and logging.
Transform schema and data changes into production-ready migration packages that protect data integrity and minimize downtime. You can handle column additions, renames, type conversions, and backfills using proven patterns like expand-contract and shadow tables. The skill generates explicit rollback scripts, validation checklists, and phased execution plans that keep applications stable throughout the migration.
You can design end-to-end NGS pipelines tailored to your experiment type (WGS, WES, RNA-seq, targeted), troubleshoot pipeline failures by analyzing QC metrics and logs, and optimize performance by fine-tuning parameters and identifying bottlenecks. This skill handles the full workflow from raw sequencing data quality assessment through variant interpretation and annotation.
You can analyze any NoSQL query—whether MongoDB, DynamoDB, Cassandra, or Firestore—to identify performance bottlenecks, missing indexes, and inefficient data access patterns. You'll receive structured recommendations with before/after comparisons, cost estimates, and refactored queries that dramatically improve performance and reduce database costs.
You can rapidly design, optimize, and validate chromatographic and LC-MS/MS methods for analyzing drugs and metabolites in biological matrices. This skill guides you through analytical method development workflows—including parameter selection, sensitivity optimization, and regulatory strategy—while ensuring ICH Q2(R2) and FDA compliance throughout the development process.